This invention relates to programming programmable transistor devices such as programmable logic devices.
There are many types of non-volatile programmable devices that require an electrical charge to be stored on or erased from transistors on the device in order to program or erase the device. Programmable logic devices and read-only memories employing EPROM, EEPROM, or flash transistors are examples of such devices. In order to successfully program or erase such transistors, a programming or erasing potential must be applied to the transistor for a particular amount of time. Although all units of a given device may be intended to be made with the same programming or erasing time interval, this parameter may in fact vary from batch to batch or even from device to device. For example, minor process variations from batch to batch may cause variation in the programming or erasing time interval parameter. If all devices must be programmed or erased at the speed of the slowest possible device, programming or erasing will be unnecessarily slowed for many devices.
It would therefore be desirable to have a custom programming or erasing speed for each of a plurality of programmable devices so that each device can be programmed or erased at a speed that is appropriate for that device.
Some programmable devices may not be programmed until after they are part of a larger assembly (e.g., after they have been assembled with other components on a printed circuit board). Particularly under these "in-system" programming conditions, it may be desirable to program or erase the device through a relatively small number of pins on the device in order to avoid having to use more extensive system resources for programming or erasing. For example, it is known to program programmable devices through a so-called JTAG interface. This interface is a standard specified in "IEEE Standard Test Access Port and Boundary-Scan Architecture", IEEE Std 1149.1-1990 (includes IEEE Std 1149.1a-1993), published by the Institute of Electrical and Electronics Engineers, Inc. on Oct. 21, 1993. JTAG programming requires use of only a small number of pins such as TMS (test mode select), TCK (test clock), TDI (test data in), and TDO (test data out). However, programming is not just a matter of applying programming data to a programmable device. It may also be necessary to place the device in programming or erasing mode by applying several control signals in a particular sequence (e.g., to avoid signal contention on the device). It may also be necessary to apply a particular programming or erasing potential to the device, which potential may be different from potentials normally applied to the device.
It would therefore be desirable to allow more complete control of the programming or erasing process through a port such as the JTAG port so that additional pins do not have to be used for applying other programming or erasing mode control signals and/or for applying special programming or erasing potentials.
In view of the foregoing, it is an object of this invention to improve the programming of programmable devices by facilitating customization of programming and/or erasing speed to more closely match the programming or erasing speed requirements of each individual device.
It is another object of this invention to improve and simplify programming of programmable devices through a communication port such as a JTAG port.